Wan-Hsuan’s thesis “Compilation and Architecture Design for Quantum Computing” focuses on design automation for quantum computing, developing scalable compilation tools and advancing architecture–software co-design to bridge the gap between rapidly evolving quantum hardware and limited compiler scalability. She has made significant contributions to quantum layout synthesis (QLS), achieving over 2,000× speedup in SMT-based optimal compilation, and introduced a multilevel framework (ML-QLS) that scales to hundreds of qubits while outperforming industry tools like Qiskit by up to 50% gate reduction. She also developed ZAC, a compiler for zoned neutral-atom architectures, improving circuit fidelity and adopted by the Munich Quantum Toolkit. In addition, she pioneered compilation for transversal partial fault-tolerant quantum computing (PFTQC), developing the first compilation flow for Trotter circuits on such systems and reducing execution overhead by more than 2×, enabling more efficient use of limited quantum resources. Beyond compilation, her work extends to quantum architecture design, where she leverages solver-based and application-driven optimization to systematically explore and improve quantum hardware designs, demonstrating substantial gains in circuit fidelity and providing key insights for next-generation quantum architectures.