UCLA Samueli Faculty Join New Effort in Next-Generation Electronic Technologies | UCLA Samueli School Of Engineering
The VAST lab is pleased to be part of the Center for Processing with Intelligent Storage and Memory (PRISM) under the JUMP 2.0 program led by UC San Diego in collaboration from Professors Jason Cong and Yizhou Sun from UCLA. The UCLA research focuses on developing novel compilation and programming support for cloud-scale in-memory and in-storage acceleration in distributed and disaggregated settings, with the goal of enabling the design of accelerators of arbitrary-size with “unlimited” high-bandwidth memories connected to computational storage with “unlimited” capacity (via disaggregation) to support intelligent memory and storage (IMS) systems; and showcasing transformative innovations in IMS systems on data-intensive grand challenge. Please see UCLA Engineering announcement for more details:https://samueli.ucla.edu/ucla-samueli-faculty-join-new-effort-in-next-generation-electronic-technologies/
Congratulations for receiving the 10-Year Retrospective Most Influential Paper Award at ASP-DAC 2023
Congratulations to Prof. Jason Cong and his former PhD students Guojie Luo and Bingjun Xiao and former postdoc Kelly Tsota for receiving the 10-Year Retrospective Most Influential Paper Award from the 28th Asia and South Pacific Design Automation Conference (ASP-DAC’2023) for their work “Optimizing Routability in Large-Scale Mixed-Size Placement” presented at ASP-DAC’2013 in Yokohama, Japan in January 2013. This is the third paper from Prof. Cong’s group receiving the the 10-Year Retrospective Most Influential Paper Award at ASP-DAC. ASP-DAC, started in 1995, is the largest conference in Asia and South-Pacific regions on Electronic Design Automation (EDA) area for VLSI and systems. The paper can be accessed from the IEEE Xplore at https://ieeexplore.ieee.org/document/6509636
UCLA VAST Lab congratulates its former members Prof. Sung Kyu Lim and Prof. Zhiru Zhang for election to IEEE Fellows
Sung Kyu Lim
for contributions to electronic design automation and tradeoff for 3-dimensional integrated circuits
for contributions to field-programmable gate array high-level synthesis and accelerator design
Each year, following a rigorous evaluation procedure, the IEEE selects a small group of recipients for elevation to IEEE Fellow. Less than 0.1% of voting members are selected annually for this member grade elevation. Sung Kyu and Zhiru, congratulations for this outstanding achievement!
Prof. Jason Cong Delivered a Keynote Speech at ICCAD’2022
Prof. Jason Cong delivered a keynote speech “Democratizing IC Designs and Customized Computing” at the 2022 International Conference on Computer-Aided Design (ICCAD) on Monday, Oct. 31, 2022 in San Diego, CA. His talk covered the decade-long effort of his group on enabling software programmers to design efficient customized accelerators.
The full presentation is available at https://ucla.box.com/s/8yx0m0v1wtobn0io87jg4xh4sw0fculpYouTube link for the Keynote Speech: https://youtu.be/qlqjymTcLdI
ICCAD is the premier forum to explore the new challenges, present leading-edge innovative solutions, and identify emerging technologies in the electronic design automation research areas. ICCAD covers the full range of CAD topics – from device and circuit-level up through system-level, as well as post-CMOS design. ICCAD has a long-standing tradition of producing a cutting-edge, innovative technical program and this year is its 41st edition.
Prof. Jason Cong Delivered a Keynote Speech at MICRO’2022
Prof. Jason Cong delivered a keynote speech “Democratizing Customized Computing” at MICRO’22 on Tuesday, Oct. 4, 2022 in Chicago. His talk covered the latest research on automated accelerator synthesis and customized computing on FPGAs, ranging from microarchitecture guided optimization, such as automated generation of highly optimized systolic arrays and stencil computation engines, to more general source-to-source transformation based on graph-based neural networks and meta learning, and finally to latency-insensitive system-level integration. His concluding remarks invite a community-wide effort in this direction. The full presentation is available at https://ucla.box.com/s/gi8ltm8h5jl4vk1bj1nqx6hxenlkpiay.
The IEEE/ACM International Symposium on Microarchitecture® is the premier forum for presenting, discussing, and debating innovative microarchitecture ideas and techniques for advanced computing and communication systems. This symposium brings together researchers in fields related to microarchitecture, compilers, chips, and systems for technical exchange on traditional microarchitecture topics and emerging research areas.
VAST Lab at DAC 2022
During July 10th and 14th, Prof. Jason Cong and members of the UCLA VAST attended the DAC 2022 conference and participated in a wide range of activities, including presenting three research papers and a tutorial, moderating a panel on the future of EDA, co-organizing the Road4NN workshop, and presenting three four papers in the Ph.D. Forum and Young DAC Fellow programs. Some of the VAST lab alumni also had a reunion before DAC. Here are some highlights with photos.
Prof. Cong was awarded the IEEE Robert N. Noyce Medal at the DAC opening session.
Prof. Cong hosted a research panel “What are the big opportunities in the next renaissance of EDA?”, with guest panelists including Sankar Basu, Timothy Green, Prith Banerjee, Jan Rabaey, Tim Cheng, and Jayanthi Pallinti.
Prof. Cong presented “Democratizing Customized Computing with Automated Accelerator Synthesis” at the special research session on “New Perspectives in High-Level Synthesis”; he also presented in a tutorial with Daniel Tan on “Qubit Mapping and Scheduling: Gap Analysis and Optimal Solutions” as par to the half-day tutorial on “Scalable Design-Program-Compilation Optimizations for Quantum Algorithms: Using Quantum Neural Network as a Case Study”
Linghao Song presented his paper “Serpens: A High Bandwidth Memory Based Accelerator for General-Purpose Sparse Matrix-Vector Multiplication”
Neha, Stephen and Suhail presented at the DAC Young Fellow Program
At the DAC Ph.D. Forum, Licheng Guo presented his Ph.D. thesis “Co-optimization High-Level Synthesis and Physical Design for Rapid Timing Closure of Larg-Scale FPGA Designs”
Atefeh presented her work “Automated Accelerator Optimization Aided by Graph Neural Networks”
The VAST lab and Hanrui Wang from MIT had a pleasant dinner together.
Daniel and Prof. Cong presented a session ‘Qubit Mapping and Scheduling: Gap Analysis and Optimal Solutions’ inside the tutorial ‘Scalable Design-Program-Compilation Optimizations for Quantum Algorithms’.
New NSF Award on Automating High Level Synthesis via Graph-Centric Deep Learning
The team led by Professors Jason Cong and Yizhou Sun from the CS Department were recently awarded $1.2M from the National Science Foundation (NSF) for the project entitled “High Level Synthesis via Graph-Centric Deep Learning”.
Domain-specific accelerators (DSAs) have shown to offer significant performance and energy efficiency over general-purpose CPUs to meet the ever increasing performance needs. However, it is well-known that the DSAs in field-programmable gate-arrays (FPGAs) or application specific integrated circuits (ASICs) are hard to design and require deep hardware knowledge to achieve high performance. Although the recent advances in high-level synthesis (HLS) tools made it possible to compile behavioral-level C/C++ programs to FPGA or ASIC designs, one still needs to have extensive experience in microarchitecture optimizations using pragmas and code transformation to the input program, which presents a significant barrier to a typical application domain-expert or software developer to design a DSA. Even worse, evaluating each HLS design candidate is time consuming, which makes it very difficult to perform manual design iteration or automated exploration. The proposed project addresses these problems by developing a fully automated framework for evaluating and optimizing the microarchitecture of a DSA design without the invocation of the time-consuming HLS tools. It represents the input C/C++ program as one or a set of graphs with the proper data flow and control flow information, including auto-inserted optimization directives (pragmas), and then makes use of the latest advances in graph-based machine learning (ML) and ML-driven optimizations to quickly evaluate each solution candidate and guide the optimization process. The goal of this project is to enable a typical software programmer to be able to design highly efficient hardware DSAs, with the quality comparable to those designed by experienced circuit designers.
Licheng Guo won the Outstanding Graduate Student Research Award from UCLA CS DepartmentLicheng Guo was selected as one of the four winners of the 2022 Outstanding Graduate Student Research Awards by the UCLA CS department. Licheng is currently a fifth-year Ph.D. student under the supervision of Prof.Jason Cong. He received his bachelor’s degree from Zhejiang University. His research focuses on the co-optimization of high-level synthesis and physical design to improve the achievable frequency and reduce the compile time. His research was recognized by two Best Paper Awards in FPGA 2021 and FPGA 2022. In addition, the algorithm proposed in his DAC’20 paper has been realized in the commercial Vitis HLS compiler from AMD/Xilinx and the artifacts from his FPGA’22 paper have been part of the RapidWright framework from AMD/Xilinx. His projects have been highlighted by the EE Journal, the SRC newsletter, and the ACM official Twitter account.
Best Paper Award at FPGA 2022 and Two Inductions to the FPGA and Reconfigurable Computing Hall of Fame
Congratulations to VAST Lab members Licheng Guo and Prof. Cong, together with collaborators from AMD/Xilinx and Cornell, Ghent University for winning the Best Paper Award at the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Array for the paper “RapidStream: Parallel Physical Implementation of FPGA HLS Designs” by Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Jie Wang, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang, and Jason Cong.
Also, Congratulations to Prof. Cong and VAST Lab alumni Zhiru Zhang, Karthik Gururaj, and Deming Chen, together with other collaborators, for the two papers inducted to the Class 2022 FPGA and Reconfigurable Computing Hall of Fame: “An Efficient and Versatile Scheduling Algorithm Based On SDC Formulation” by Jason Cong and Zhiru Zhang published at the 2006 Design Automation Conference, and “FCUDA: Enabling Efficient Compilation of CUDA Kernels onto FPGAs” by Alexandros Papakonstantinou, Karthik Gururaj, John A. Stratton, Deming Chen, Jason Cong, and Wen-Mei Hwu published in the 2009 Symposium of Application-Specific Processors.
Prof. Jason Cong giving the Vision Address at the 35th International Conference on VLSI Design
Prof. Jason Cong gave the Vision Address at the 35th International Conference on VLSI Design entitled “Democratize IC Designs and Customized Computing” on February 28, 2022 (PST).
YouTube link for the talk:
Congratulations to Prof. Jason Cong for receiving the 2022 IEEE Robert N. Noyce Medal
Congratulations to Prof. Jason Cong for receiving the 2022 IEEE Robert N. Noyce Medal “For fundamental contributions to electronic design automation and FPGA design methods.” The IEEE Robert N. Noyce Medal is a science award presented by the IEEE for outstanding contributions to the microelectronics industry. The medal is named in honour of Robert N. Noyce, the founder of Intel Corporation. He was also renowned for his 1959 invention of the integrated circuit. The medal is funded by Intel Corporation and was first awarded in 2000. The past winners include TSMC Founder and CEO Morris Chang, Intel CEO Craig Barrett, and most recently AMD CEO Lisa Su.
Prof. Cong giving a keynote speech at ISVLSI 2021
Prof. Cong gave a keynote speech entitled “Layout Synthesis for Quantum Computing: Gap Analysis and Optimal Solution” at the 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) on Thursday, July 8, 2021.
YouTube Link for the talk:
Link to ISVLSI Keynote speakers:
Prof. Cong giving a keynote speech at IPDPS’21
Prof. Cong gave a keynote speech entitled From Parallelization to Customization – Challenges and Opportunities at the 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS) on Thursday, May 20, 2021.
IPDPS is an international forum for engineers and scientists from around the world to present their latest research findings in all aspects of parallel computation. In addition to technical sessions of submitted paper presentations, the meeting offers workshops, tutorials, and commercial presentations & exhibits. IPDPS represents a unique international gathering of computer scientists from around the world. Now, more than ever, the IPDPS community prizes this annual meeting as a testament to the strength of international cooperation in seeking to apply computer science technology to the betterment of the global village.
Jie Wang won the Outstanding Graduate Student Research Award by UCLA CS DepartmentJie Wang was selected as one of the four winners of the 2021 Outstanding Graduate Student Research Awards by UCLA CS department.Jie is currently a sixth-year PhD student under the supervision of Prof.Jason Cong. He received his bachelor degree from Tsinghua University. His research focuses on compilation support and architecture exploration of systolic array architectures. In his latest work published in FPGA 2021, he developed an open-source systolic array compiler, AutoSA (https://github.com/UCLA-VAST/AutoSA), that is capable of generating high-performance systolic arrays on FPGAs within hours.Link to Jie Wang’s personal website: https://cadlab.cs.ucla.edu/~jaywang/
Best Paper Award at the 29th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2021)Computer Science Professor Jason Cong and his students Licheng Guo, Yuze Chi, Jie Wang, Jason Lau, and Weikang Qiao, in collaboration with Professor Zhiru Zhang and his student Ecenur Ustun at the Cornell University, have received the Best Paper Award from the 29th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2021) for their paper “AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs” in March 2021. AutoBridge addresses an important problem of how to raise the level of design abstraction while still achieving high frequency designs. makes important contributions to improving the timing quality of HLS compilation techniques. It introduces an effective methodology by coupling coarse-grained floorplanning with high-level synthesis (HLS) to enable interconnect pipelining. AutoBridge improves the clock frequency by 2X on average when tested on a wide range of large-scale designs on multi-die FPGAs.The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays is the premier conference for the presentation of advances in all areas related to FPGA technology. Among the papers accepted this year, the program committee nominated three papers, which were reviewed by another confidential selection committee. The selection committee unanimously declared AutoBridge to be the final winner. A total of 135 papers were submitted to FPGA’2021, among those 26 were accepted, and one was selected for the Best Paper Award.
Congratulations to Linghao Song for Receiving the EDAA Outstanding Dissertations Award 2020
Linghao was selected as one of the four winners of EDAA Outstanding Dissertations Award 2020. In the dissertation, he focused on the architecture for deep learning and graph processing.
Linghao is a postdoctoral researcher under the supervision of Prof. Jason Cong, and his current research project is FPGA acceleration for graph-based machine learning. He received his Ph.D. degree from Duke working with Prof. Yiran Chen and Prof. Hai Li.
Details can be found at https://www.edaa.com/awards.html.
Congratulations to Atefeh Sohrabizadeh for Winning Cadence Women in Technology Scholarship
Atefeh Sohrabizadeh is one of 15 winners of the Cadence Women in Technology Scholarship. Atefeh joined the Ph.D. program in UCLA Computer Science Program in Fall 2018. Her research interests lie in parallel architecture and programming. She is involved in research projects focusing on customized computing for deep learning applications and raising the abstraction level for FPGA design and was the lead author of the FlexCNN (FPGA’20) and AutoDSE (pre-print available on arXiv).
Congratulations to Prof. Jason Cong for Election to the Fellow of the National Academy of Inventors
The National Academy of Inventors (NAI) announced Tuesday its 2020 class of fellows, including four UCLA Samueli School of Engineering faculty members. There are now 18 UCLA Samueli-affiliated NAI fellows.
Election to the NAI fellowship is the highest professional distinction exclusive for inventors and innovators from academic institutions. This year, 175 fellows joined this prestigious cohort in recognition of their accomplishments in “creating or facilitating outstanding inventions that have made a tangible impact on quality of life, economic development and the welfare of society.”
For the full story, please visit: https://samueli.ucla.edu/four-ucla-engineering-researchers-named-to-national-academy-of-inventors/
Prof. Jason Cong appointed as the Volgenau Chair for Engineering Excellence in the Samueli School of Engineering
Professor Jason Cong has been appointed as the Volgenau Chair for Engineering Excellence in the Samueli School of Engineering. Prof. Cong joined the UCLA faculty in 1990. He is the Director of Center for Domain-Specific Computing (funded by an NSF Expeditions in Computing Award) and the Director of VLSI Architecture, Synthesis, and Technology (VAST) Laboratory. From 2005 to 2008, he served as the chair of the UCLA Computer Science Department. His research interests include electronic design automation, customized computing, quantum computing, and highly scalable algorithms. He is a Fellow of ACM and IEEE and a member of National Academy of Engineering.
Link to the UCLA Computer Science Department News:
UCLA Computer Scientists Set Benchmarks to Optimize Quantum Computer Performance
Two UCLA computer scientists have shown that existing compilers, which tell quantum computers how to use their circuits to execute quantum programs, inhibit the computers’ ability to achieve optimal performance. Specifically, their research has revealed that improving quantum compilation design could help achieve computation speeds up to 45 times faster than currently demonstrated.
For more information, please visit: https://samueli.ucla.edu/ucla-computer-scientists-set-benchmarks-to-optimize-quantum-computer-performance/.
UCLA is selected as one of the four world-class universities by Xilinx to establish Adaptive Computer Research Clusters
Xilinx Teams with Leading Universities Around the World to Establish Adaptive Compute Research Clusters to spearhead novel research into all areas of adaptive compute acceleration.
The cluster at UCLA will focus on energy-efficient computing, customized computing for big-data applications and highly scalable algorithms. Prof. Jason Cong, Director for the Center for Customizable Domain-Specific Computing at UCLA Samueli School of Engineering, will lead the effort. Prof. Cong has been at the forefront of FPGA technology research for more than 30 years.
Congratulations to Dr. Zhe Chen for Receiving the 2019 Chancellor’s Award for Postdoctoral Research
Zhe was selected as one of eight recipients of the 2019 Chancellor’s Award for Postdoctoral Research. This award was established in 1998 to recognize the important contributions that postdoctoral scholars make to UCLA’s research mission.
Zhe devotes his postdoctoral research efforts to using customizable computing to advance the real-time closed-loop neurofeedback for the brain-machine interface, under the supervision of Prof. Jason Cong from Computer Science Department and Prof. Hugh T. Blair from Psychology Department.
More information can be found at https://www.postdoc.ucla.edu/chancellors-award-for-postdoctoral-research/
Photo: Left to Right: Dean of the Graduate Division Robin L. Garrell, Zhe Chen, Vice Chancellor for Research Roger M. Wakimoto
Prof. Cong giving Keynote Speech at ASP-DAC ‘2020
Prof. Jason Cong gave a keynote speech entitled “Design Automation for Customizable Computing” at ASP-DAC’2020 on Jan. 20, 2020 in Beijing China. ASP-DAC 2020 is the 25th annual international conference on VLSI design automation in Asia and South Pacific region, one of the most active regions of design and fabrication of silicon chips in the world. The conference provides the Asian and South Pacific CAD/DA and Design community with opportunities of presenting recent advances and with forums for future directions in technologies related to Electronic Design Automation (EDA).
2019 IEEE/ACM William J. McCalla ICCAD Best Paper Award
Computer Science Professor Jason Cong, together with his co-authors Zhenyuan Ruan (former student, now at MIT), and Tong He (former student, now at Google), have received the 2019 IEEE/ACM William J. McCalla ICCAD Best Paper Award for their paper “Analyzing and Modeling In-Storage Computing Workloads On EISC — An FPGA-Based System-Level Emulation Platform” published in the IEEE/ACM International Conference on Computer-Aided Design (ICCAD) in Nov. 4-6, 2019 at Denver, CO.
Presented at ICCAD each November, this Award is jointly sponsored by ACM/SIGDA, IEEE/CASS, and IEEE/CS. Papers are selected by the ICCAD Program Committee through a rigorous and multi-stage review process. This Award is given in the memory of William J. McCalla, for his contributions to ICCAD and his CAD technical work throughout his career. This year ICCAD had 394 submissions and accepted 94 papers. Only 2 papers out of them received the best paper award.
About ICCAD: Jointly sponsored by IEEE and ACM, ICCAD has been the premier forum to explore emerging technology challenges in electronic design automation (EDA), present leading-edge R&D solutions, and identify future research directions. The ICCAD scope has also been adapted and expanded to address emerging technology, design, and automation challenges including those in AI, IoT, security, among others.
Computer science professor honored by the Semiconductor Industry Association
Jason Cong, Distinguished Chancellor’s Professor of computer science in the UCLA Samueli School of Engineering, has won the 2019 University Research Award from the Semiconductor Industry Association, in collaboration with the Semiconductor Research Corporation.
For more information, please visit http://newsroom.ucla.edu/dept/faculty/computer-science-professor-honored-by-the-semiconductor-industry-association
Prof. Cong giving IEEE CEDA Distinguished Lecture at UIUC
Prof. Cong delivered the IEEE CEDA distinguished lecture at the University of Illinois at Urbana–Champaign on Monday, September 23, 2019. The talk title is “Democratize Customizable Computing”.
2019 Donald O. Pederson Best Paper Award
Computer Science Professor Jason Cong, together with his co-authors Dr. Chen Zhang (former visiting student, now at Microsoft Research Asia), Prof. Guangyu Sun (Peking University), Prof. Zhenman Fang (former postdoc, now faculty member at Simon Fraser Univ.), Peipei Zhou (current PhD student), and Peichen Pan (Falcon Computing), have received the 2019 Donald O. Pederson Best Paper Award from the IEEE Council for Design Automation (CEDA) for their paper “Caffeine: Towards Uniformed Representation and Acceleration for Deep Convolutional Neural Networks” published in the IEEE Transactions on Computer-Aided Design (CAD) in Oct. 2018. Donald O. Pederson Best Paper Award seeks to recognize the best paper published in the IEEE Transactions on CAD in the two calendar years preceding the award. The selection process starts with nomination of best paper candidates by the current Associate Editors of the IEEE TCAD. Among the papers published over the preceding two years, papers receiving highest citations or highest downloads are automatically nominated for review and voting by the entire editorial board. This year the editorial board nominated five papers, and another nine papers are auto-nominated. After the voting, top five papers are reviewed by a confidential review committee before a final selection is made. The selection committee unanimously agreed to declare two papers to be co-winners. This award is recognized at the Design Automation Conference in Las Vegas on June 4, 2019.
Google Faculty Research Award for 2019Prof. Jason Cong is one of the recipients of the Google Faculty Research Award (FRA) for 2019. Google FRA program is focused on funding world-class technical research in Computer Science, Engineering, and related fields. Among 910 proposals from 40 countries and over 320 universities submitted this year, 158 projects were selected for funding this year.
Best Paper Award at FPGA’19Computer Science Professor Jason Cong and coauthors Yi-Hsiang Lai, Yuze Chi, Yuwei Hu, Jie Wang, Cody Hao Yu, Yuan Zhou, and Prof. Zhiru Zhang has received the Best Paper Award at the 27th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays held in Seaside, CA, February 24-26, 2019. Their paper, “HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing” results from a close collaboration between Prof. Zhang’s group at Cornell and Prof. Cong’s group at UCLA. HeteroCL is a multi-paradigm programming infrastructure for heterogeneous platforms integrating CPUs and FPGAs. HeteroCL not only provides a clean abstraction that decouples the algorithm from compute/data customization, but it also captures the interdependence among them. Moreover, HeteroCL incorporates spatial architecture templates including systolic arrays and stencil with dataflow architectures. HeteroCL can help developers to focus more on designing efficient algorithms rather than being distracted by low-level implementation details.The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays is the premier conference for presentation of advances in all areas related to the FPGA technology, including FPGA architecture, FPGA circuit design, CAD for FPGAs, high-level abstractions and tools for FPGAs, FPGA-based and FPGA-like computing engines, as well as applications and design studies. This year’s Best Paper Award is selected from a total of 161 submissions.
Prof. Cong giving keynote at the Computing in the 21st Century Conference & Asia Faculty Summit on MSRA’s 20th Anniversary
Prof. Cong delivered a keynote speech at the 2018 Computing in the 21st Century Conference (21CCC) & Asia Faculty Summit hosted by Microsoft Research Asia (MSRA) in junction with the MSRA 20-Year Anniversary Celebration on November 6, 2018 held in Beijing, China. The title of Prof. Cong’s speech is “Automating Customizable Computing – Democratizing Accelerator Designs at the Edge and in the Cloud.”
Best Paper Award at ISLPED’18
The paper is co-authored by Zhe Chen, Andrew Howe, Hugh T. Blair, and Jason Cong with the title “CLINK: Compact LSTM Inference Kernel for Energy Efficient Neurofeedback Devices.” received the Best Paper Award at the International Symposium on Low Power Electronics and Design (ISLPED’18) held in Seattle, WA, USA during July 23-25, 2018. Dr. Zhe Chen is a postdoctoral researcher jointly supervised by Prof. Jason Cong from the Computer Science Department and Prof. Tad Blair from the Psychology Department. This paper presents a highly energy-efficient electroencephalography (EEG) signal processing accelerator for neurofeedback devices using the long short-term memory (LSTM) based neural network model. It has potential applications for treating neurological diseases such as Parkinsonism and epilepsy using neurofeedback deep brain stimulation.
The International Symposium on Low Power Electronics and Design (ISLPED) is the premier forum for presentation of innovative research in all aspects of low power electronics and design, ranging from process technologies and analog/digital circuits, simulation and synthesis tools, system-level design and optimization, to system software and applications. It is co-sponsored by the IEEE Circuits and Systems (CAS) Society and the ACM SIGDA. This year two papers are selected for the Best Paper Award from 150 submissions.
VAST Lab at FCCM 2018
From Apr 29th to May 1st, Zhenyuan Ruan, Weikang Qiao, Jie Wang, Tianhe Yu, Prof. Cong from VAST lab and Dr. Zhenman Fang (postdoc alumni from VAST lab) attended 2018 International Symposium on Field-Programmable Custom Computing Machines (FCCM), a top-tier conference on reconfigurable computing. In FCCM this year, we got two full paper (22/106, acceptance ratio: 20.7%), two short paper (7/48, acceptance ratio: 14.6%) and two posters accepted. For more information, please refer to http://vast.cs.ucla.edu/publications.
Jason Cong and Song-Chun Zhu: Center for Research in Intelligent Storage and Processing in Memory (CRISP)
We are pleased to announce that Professors Jason Cong (CS) and Song-Chun Zhu (CS and Statistics) are part of the University of Virginia’s new $27.5M Center on Research in Intelligent Storage and Processing in Memory (CRISP)—one of six Joint University Microelectronics Program (JUMP) centers nationwide that are managed by the Semiconductor Research Corporation with cost-sharing from DARPA. Each research center will examine a different challenge in advancing microelectronics—a field that is crucial to the U.S. economy and its national defense. The six JUMP centers are located at the University of Virginia, UC Santa Barbara, Carnegie Mellon, Purdue, University of Michigan and Notre Dame.
UV’s CRISP Center will bring together researchers from eight universities in an effort to remove the separation between memories that store data and processors that operate on that data—a separation that has been part of all mainstream computing architectures since 1945 when von Neumann first outlined how programmable computers should be structured. Unfortunately, that technology led to today’s “memory wall” in which data access has become a major performance bottleneck. Professors Cong and Zhu will work with CRISP researchers and become instrumental in removing that bottleneck.
Prof. Cong giving distinguished lecture at the ECE Department of Northeastern University.
Prof. Cong delivered a distinguished lecture at the ECE Department of Northeastern University in Boston, MA on February 21, 2018.
The title of Prof. Cong’s speech is “Computing Near the End of Moore’s Law”.
The link of the video is :
Congratulations to Dr. Zhiru Zhang for the Rising Professional Achievement Award from the UCLA School of Engineering and Applied Sciences.
Zhiru received his PhD from UCLA in 2007 under the supervision of Prof. Jason Cong. Currently, he is an Assistant Professor in the School of Electrical and Computer Engineering at Cornell University. His research investigates new algorithms, methodologies, and tools to extend the frontiers of design automation for high-performance and energy-efficient computer systems. His research has been recognized with the UCLA Rising Professional Achievement Award (2018), a DARPA Young Faculty Award (2015), the IEEE CEDA Ernest S. Kuh Early Career Award (2015), an NSF CAREER Award (2015). Prior to joining Cornell, Zhiru co-founded AutoESL Design Technologies, Inc. with Prof. Jason Cong, Dr. Yiping Fan, and Dr. Jing Chang. AutoESL was acquired by Xilinx in 2011. Its high-level synthesis tool is now known as Vivado HLS, widely used in the industry.
The Rising Professional Achievement Award honors the early career achievements of alumni who are under the age of 40, with impactful accomplishments in academia, industry or entrepreneurship; contributions to the engineering profession; a demonstrated commitment to mentorship; and notable service to the community and the profession
- UCLA and Cornell Research Team Win Award from Intel and the National Science Foundation for Heterogeneous Computing Research Effort.Please read the full press at the following link:
- Prof. Cong delivered a keynote speech at the 2017 China National Computer Congress (CNCC) on October 27, 2017 held in Fuzhou, China. The title of Prof. Cong’s speech is “Computing Near the End of Moore’s Law”.Prof. Cong is awarded “Distinguished Contribution Award” by the China Computer Federation (CCF) on CNCC.Slides available here:http://vast.cs.ucla.edu/~cong/slides/cncc2017_final_JasonCong.pdfRelated News:http://www.ccf.org.cn/c/2017-09-27/614976.shtmlhttp://www.ccf.org.cn/c/2017-10-30/617832.shtml
- Prof. Cong’s induction to the National Academy of Engineering Prof. Jason Cong was inducted to the National Academy of Engineering on Oct. 8, 2017 in Washington DC for pioneering contributions to application-specific programmable logic via innovations in field-programmable gate array synthesis.
Prof. Cong giving keynote at IISWC’2017
Prof. Cong delivered a keynote speech at the 2017 IEEE International Symposium on Workload Characterization (IISWC’17) on October 2, 2017 held in Seattle, WA. The title of Prof. Cong’s speech is “Characterization and Acceleration for Genomic Sequencing and Analysis”. The talk covers background on genomic processing pipeline, workload characterization and optimization and acceleration developed in the group.
Slides available here:
Best Paper Award at MEMSYS 2017: Authors Cong, Fang, Gill, Javadi, Reinman
Computer Science Department authors Jason Cong, Zhenman Fang, Michael Gill, Farnoosh Javadi, and Glenn Reinman have received a Best Paper Award at MEMSYS 2017 (2-5 October, Washington DC) for their recent paper AIM: Accelerating Computational Genomics through Scalable and Noninvasive Accelerator-Interposed Memory (https://memsys.io/). An abstract of this paper follows:
Computational genomics plays an important role in health care, but is computationally challenging as most genomic applications use large data sets and are both computation-intensive and memory-intensive. Recent approaches with on-chip hardware accelerators can boost computing capability and energy efficiency, but are limited by the memory requirements of accelerators when processing workloads like computational genomics. In this paper we propose the accelerator-interposed memory (AIM) as a means of scalable and noninvasive near-memory acceleration. To avoid the high memory access latency and bandwidth limitation of CPU-side acceleration, we design accelerators as a separate package, called AIM module, and physically place an AIM module between each DRAM DIMM module and conventional memory bus network. Experimental results for genomic applications confirm the benefits of AIM. Due to the much lower memory access latency and scalable memory bandwidth, our non-invasive AIM achieves much better performance scalability than the CPU-side acceleration when the memory system scales up.
Customizable Accelerated Computing Will Be Used in Brain ResearchThis collaborative work involves a team of researchers from several areas of UCLA. Professor Jason Cong and Professor Tad Blair from UCLA’s Brain Research Institute are refining the wireless miniscope to give it built-in, energy-efficient computing capability for real-time feedback and analysis.Please read about this ground-breaking research on the UCLA Newsroom website:
CDSC Will Develop Customizable Computing Technology for Augmented Reality Funded by Intel and NSF
The full press release is available at:
Peng Wei for 2016-2017 Symantec Outstanding Graduate Student Research Award
Congratulations to Peng Wei (advisor: Prof. Jason Cong) for receiving the 2016-2017 Symantec Outstanding Graduate Student Research Award.
Bingjun Xiao for 2016 EDAA Outstanding PhD Dissertation Award
Congratulations to Bingjun Xiao (PhD’2015, advisor, Jason Cong), whose dissertation “Communication Optimization for Customizable Domain-Specific Computing”, has been awarded the 2016 EDAA Outstanding PhD Dissertation Award. The award was presented at the conference DATE 2017 – Design, Automation & Test in Europe, on Mar 28 in Lausanne, Switzerland.
The full press release of EDAA is available at http://www.edaa.com/press_releases/EDAA_Award_2016_Results.pdfEDAA is a non-profit association. Its purpose is to operate for educational, scientific and technical purposes for the benefit of the international electronics design and design automation community. The Association, in the field of design and design automation of electronic circuits and systems, promotes a series of high quality technical international conferences and workshops across Europe and cooperates actively to maintain harmonious relationships with other national and international technical societies and groups promoting the purpose of the Association. EDAA is the main sponsor of DATE, the premier Design, Automation and Test Conference and Exhibition in Europe.
ACM/SIGDA TCFPGA initiated the FPGA and Reconfigurable Computing Hall of Fame program at the symposium
In celebrating the 25th anniversary of the FPGA Symposium, which took place February 22nd through 24th in Monterey, California, ACM/SIGDA TCFPGA initiated the FPGA and Reconfigurable Computing Hall of Fame program at the symposium.The paper entitled “FlowMap: An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs” by Prof. Jason Cong and his former PhD student Dr. Eugene Ding published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1994, was inducted to the inaugural class of the Hall of Fame (http://hof.tcfpga.org).
The endorsement letter is available at http://hof.tcfpga.org/wp-content/uploads/2017/02/flowmap1994_class2017.pdf.
About ACM FPGA: The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, held annually in Monterey, is the premiere forum for the presentation of advances in all areas of FPGA technology. http://www.isfpga.org/.
UCLA Pioneers elected to National Academy of Engineering
Three faculty members of the UCLA Henry Samueli School of Engineering and Applied Science – Jason Cong and George Varghese of Computer Science, and Behzad Razavi of Electrical Engineering (pictured left to right above) – have been elected to the National Academy of Engineering, among the highest honors that can be accorded to an American engineer. The academy announced the 2017 class of 84 members and 22 foreign members on February 8.
With the election of Cong, Varghese and Razavi, UCLA Engineering has 35 affiliated faculty members who are members of the National Academy of Engineering.
Jingsheng Jason Cong, Distinguished Chancellor’s Professor of Computer Science, was recognized by the academy “for pioneering contributions to application-specific programmable logic via innovations in field programmable gate array (FPGA) synthesis.”
George Varghese, Chancellor’s Professor of Computer Science, was recognized by the academy “for network algorithmics that make the Internet faster, more secure, and more reliable.”
Behzad Razavi, Chancellor’s Professor of Electrical Engineering, was recognized by the academy “for contributions to low-power broadband communication circuits.”
Dr. Zhenman Fang is selected as one of the four Institute for Digital Research and Education (IDRE) inaugural fellows
Dr. Zhenman Fang, advised by Professor Cong, is selected as one of the four Institute for Digital Research and Education (IDRE) inaugural fellows. Dr. Fang is researching on how new computer architectures can impact DNA sequencing technology.
The IDRE fellowship program was initiated as a mechanism to build a cohort of UCLA postdoctoral scholars and early career researchers and engage them in the IDRE community. Fellowship applicants were nominated by faculty sponsors and the recipients were selected by faculty from IDRE’s Executive Committee.
More information is available at https://idre.ucla.edu/featured/idre-selects-inaugural-fellows
Dr. Zhenman Fang presented the Blaze demo at the C-FAR annual review
Dr. Zhenman Fang presented the Blaze demo on Dec 6, 2016 at the C-FAR (Center for Future Architectures Research) annual review hosted at University of Michigan. The Blaze demo won the 3rd place out of 49 demos from 15 top universities. Congratulations to all Blaze team members: Muhuan Huang, Di Wu, Cody Yu, Zhenman Fang, Matteo Interlandi, Tyson Condie and Jason Cong. More information about the C-FAR is avaialble at https://www.futurearchs.org/.
Prof. Cong giving keynote at IEEE NAS’2016
Prof. Jason Cong delivered the opening keynote speech at the The 11th IEEE International Conference on Networking, Architecture, and Storage (NAS 2016) on August 8, 2016 held at Long Beach, California. NAS provides a high-quality international forum to bring together researchers and practitioners from academia and industry to discuss cutting-edge research on networking, high-performance computer architecture, and parallel and distributed data storage technologies. The title of Prof. Cong’s speech is “Customizable Computing at Datacenter Scale”. More information about the conference is available at http://www.nas-conference.org/NAS-2016/index.html.
The 2016-2017 Dissertation Year Fellowship.
Di Wu, advised by Professor Cong, is selected as 2016-2017 Dissertation Year Fellows by the UCLA Graduate Division.
The fellowship program’s intention is to support the final year of graduate school at the disertation writing stage and to facilitate the start of the teaching or research appointments soon after the end of the dissertation fellowship year.
From IEEE Computer Society Announcement on Feb. 22, 2016.
Dr. Jason Cong, a Chancellor’s Professor at the Computer Science Department, with joint appointment from Electrical Engineering Department of University of California, Los Angeles, has been selected to receive the 2016 Technical Achievement Award “For setting the algorithmic foundations for high-level synthesis of field programmable gate arrays”.
The IEEE Computer Society Technical Achievement Award is given for outstanding and innovative contributions to the fields of computer and information science and engineering or computer technology, usually within the past 10, and not more than 15, years. Contributions must have significantly promoted technical progress in the field. The complete IEEE Computer Society announcement is available at https://www.computer.org/web/pressroom/cong-tech-achievement.
Dr. Cong, elected to an IEEE Fellow in 2000 and ACM Fellow in 2008, is the recipient of the 2010 IEEE Circuits and System (CAS) Society Technical Achievement Award “For seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation.” Dr. Cong is the only award recipient to receive the Technical Achievement Award from both the IEEE Computer Society and the IEEE CAS.
Prof. Cong gave keynote speech at ASP-DAC 2016
Prof. Jason Cong delivered a keynote speech on “Compilation for Customized Computing — From Single-Chips to Data Centers” at the 21st Asia and South Pacific Design Automation Conference(ASP-DAC 2016) in Macao, China on Jan. 28, 2016. ASPDAC aims at providing the Asian and South Pacific CAD/DA and Design community, one of the most active regions of design and fabrication of silicon chips in the world, with opportunities of presenting recent advances and with forums for future directions in technologies related to Electronic Design Automation (EDA). For more information about the conference, please visit http://www.amsv.umac.mo/aspdac2016/
Prof. Cong gave keynote speech at H2RC’15 held in conjunction with SC’15
Prof Cong gave keynote speech “Datacenter-Scale Customizable Computing” at first International Workshop on Heterogeneous High-performance Reconfigurable Computing( H2RC’15) Held in conjunction with Super Computing 2015.
- UCLA and Cornell Research Team Win Award from Intel and the National Science Foundation for Heterogeneous Computing Research Effort.Please read the full press at the following link:
- About H2RC’15: http://h2rc.cse.sc.edu/index.html
Prof. Cong gave keynote speech at HALO’15
Prof. Cong gave keynote speech entitled “Machine Learning on FPGAs” on November 5, 2015 at HALO’2015 (the First Workshop on Hardware and Algorithms for Learning On-a-Chip) co-located at the International Conference on Computer-Aided Design (ICCAD’15).
Machine learning algorithms, such as those for image based search, face recognition, multi-category classification, and scene analysis, are being developed that will fundamentally alter the way individuals and organizations live, work, and interact with each other. However their computational complexity still challenges the state-of-the-art computing platforms, especially when the application of interest is tightly constrained by the requirements of low power, high throughput, small latency, etc. In recent years, there have been enormous advances in implementing machine learning algorithms with application-specific hardware (e.g., FPGA, ASIC, etc.). There is a timely need to map the latest learning algorithms to physical hardware, in order to achieve orders of magnitude improvement in performance, energy efficiency and compactness. Recent progress in computational neurosciences and nanoelectronic technology, such as resistive memory devices, will further help shed light on future hardware-software platforms for learning on-a-chip. The overarching goal of this workshop is to explore the potential of on-chip machine learning, to reveal emerging algorithms and design needs, and to promote novel applications for learning. It aims to establish a forum to discuss the current practices, as well as future research needs.
Alumni Prof. Deming Chen wins Best Paper Award at ICCAD’15
Alumni Prof. Deming Chen wins Best Paper Award at ICCAD’15, Austin, TX.
The paper is W. Zuo, W. Kemmerer, J. B. Lim, L.-N. Pouchet, A. Ayupov, T. Kim, K. Han, and D. Chen, “A polyhedral-based SystemC modeling and generation framework for effective low-power design space exploration,” Proceedings of IEEE/ACM International Conference on Computer-Aided Design, November 2015.
ICCAD is the premier forum to explore emerging technology challenges, present cutting-edge R&D solutions, record theoretical and empirical advances, and identify future roadmaps for design automation. Continuing a long tradition, ICCAD continues to be the home for the ACM/SIGDA CADathlon and Student Research Competition, several CAD contests, including the IEEE CEDA CAD Contest, and a remarkable set of workshops on design automation for analog and mixed-signal circuits, EDA research on learning on a chip, design for dark silicon era, variability modeling and characterization, and formal verification.
Alumni Prof. Zhiru Zhang received the first IEEE CEDA Ernest S. Kuh Early Career Award
VAST Lab alumni Prof. Zhiru Zhang at Cornell University received the first IEEE CEDA Ernest S. Kuh Early Career Award on Nov. 2 at the opening session of ICCAD’2015.
The IEEE CEDA Ernest S. Kuh Early Career Award honors an individual who has made innovative and substantial technical contributions to the area of Electronic Design Automation in the early stages of his or her career.http://ieee-ceda.org/awards/ernest-s-kuh-early-career
Google Faculty Research Award for 2015
Prof Jason Cong is one of the recipients of the Google Faculty Research Award for 2015. The one-year award supports the work of world-class, permanent faculty members at top universities around the world. with the aim of advancing cutting-edge research in computer science, engineering and related fields.http://newsroom.ucla.edu/dept/faculty/two-computer-science-professors-win-google-faculty-research-award
Book “Customizable Computing” Published
At the conclusion of the “Customizable Domain-Specific Computing” project funded by the NSF Expeditions in Computing program in 2009, Prof. Cong, Prof. Reinman and their graduate students in the Center for Domain-Specific Computing (CDSC) published a book in the series of Synthesis Lectures on Computer Architecture by Morgan & Claypool Publishers. This book presents an overview and introduction of the recent developments on energy-efficient customizable architectures, including customizable cores and accelerators, on-chip memory customization, and interconnect optimization. In addition to a discussion of the general techniques and classification of different approaches used in each area, it also highlights and illustrates some of the most successful design examples in each category and discuss their impact on performance and energy efficiency. A large body of the research covered in the book were obtained during the course of the Expeditions in Computing project.
Prof Cong’s Keynote Speech at 2015 SOCC
Prof. Cong gave a keynote speech entitled as “High-Level Synthesis and Beyond — from Datacenters to IoTs” at SOCC’15, the 28th IEEE International System-on-Chip Conference, Beijing, China on September 9, 2015.
About SOCC’15: In its 27 years of history, the IEEE International System-on-Chip Conference (SOCC) has been the premier forum for sharing advances in system-on-chip (SoC) technologies, designs, tools, test, verification and applications. Held at changing locations in the USA, Europe and Asia, SOCC is attracting researchers and engineers from all over the world to exchange knowledge, share experiences and establish collaborations with colleagues.
SOCC’15 website: www.ieee-socc.org/
Prof Cong Received ASPDAC Ten-Year Retrospestive Most Influential Paper Award
Research paper by Jason Cong, a Chancellor’s Professor in UCLA’s Computer Science Department, and his former doctoral student, Yan Zhang, was selected as the 10-Year Retrospective Most Influential Paper in the 2015 Asia South-Pacific Design Automation Conference (ASPDAC). The award for the paper, “Thermal-Driven Multilevel Routing for 3-DICs,” was presented at the opening ceremony of ASPDAC’15 on Jan. 20, in Chiba/Tokyo, Japan.Cong, on faculty at the UCLA Henry Samueli School of Engineering and Applied Science, is the director of Center for Domain-Specific Computing, co-director of UCLA/Peking University Joint Research Institute in Science and Engineering and co-director of the VLSI CAD Laboratory. His research interests include synthesis of VLSI circuits and systems, programmable systems, novel computer architectures, nano-systems and highly scalable algorithms. He has over 350 publications in these areas and has won seven best paper awards and the 2011 ACM/IEEE A. Richard Newton Technical Impact Award in Electric Design Automation.
He was elected to an IEEE Fellow in 2000 and ACM Fellow in 2008. He is the recipient of the 2010 IEEE Circuits and System Society Technical Achievement Award “for seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation.”
Prof Cong Received ICCAD Ten-Year Retrospestive Most Influential Paper Award
Congratulations to Jason Cong and coauthors Jie Wei and Yan Zhang. Their 2004 paper, A Thermal-Driven Floorplanning Algorithm for 3D ICs, has received this year’s ICCAD Ten-Year Retrospective Most Influential Paper Award. ICCAD (International Conference on Computer-Aided Design) judged this paper to be the “most influential on research and industrial practice in computer-aided design of integrated circuits over the ten years since its original appearance at ICCAD.”
Prof Cong Received Distinguished Alumni Achievement Award from UIUC
Prof. Jason Cong is selected as a recipient of the Distinguished Alumni Achievement Award from the Department of Computer Science at the University of Illinois at Urbana-Champaign. The award is given on Oct. 24, 2014 during the CS @ ILLINOIS 50th Anniversary Celebration.
The information of the event and other awardees is available at
Prof Cong’s Keynote Speech at 22nd IPIP/IEEE VLSI-SoC
Prof. Jason Cong is giving the keynote speech entitled “Design Automation Beyond High-Level Synthesis” at the 22nd IPIP/IEEE VLSI-SoC 2014 on Oct. 6, 2014.
VLSI-SoC 2014 is the 22nd in a series of international conferences sponsored by IFIP TC 10 Working Group 10.5, IEEE CEDA and IEEE CASS, which explores the state-of-the-art in the areas that surround Very Large Scale Integration (VLSI) and System-on-Chip (SoC).
Previous conferences have taken place in Edinburgh, Trondheim, Tokyo, Vancouver, Munich, Grenoble, Gramado, Lisbon, Montpellier, Darmstadt, Perth, Nice, Atlanta, Rhodes, Florianópolis, Madrid, Hong Kong, Santa Cruz and Istanbul.
The purpose of VLSI-SoC is to provide a forum to exchange ideas and showcase research as well industrial results in EDA, design methodology, test, design, verification, devices, process, systems issues and application domains of VLSI and SoC.
The conference website is http://www.vlsi-soc.com
Aug 2014: Keynote Speech in ISLPED 2014 by Prof. Cong
In 14th IEEE International Symposium on Low Power Electronics and Design (ISLPED) 2014, La Jolla, CA, Professor Cong gave a keynote speech entitled “Accelerator-Rich Architectures — From Single-chip to Datacenters”.
The International Symposium on Low Power Electronics and Design (ISLPED) is the premier forum for presentation of recent advances in all aspects of low power design and technologies, ranging from process and circuit technologies, to simulation and synthesis tools, to system level design and optimization.
July 2014: Alumni Prof. David Pan Appointed as “Engineering Foundation Professor” at UT Austin
Congratulations to David Pan for the appointment “Engineering Foundation Professor” at UT Austin. Last year David got Earl N. and Margaret Brasfield Endowed Faculty Fellowship in Engineering.
David Z. Pan received his Ph.D. degree (with honor) from the VAST Lab (formerly the VLSI CAD Lab) in Computer Science from University of California at Los Angeles (UCLA) in 2000. In 2003, He joined Department of Electrical and Computer Engineering, The University of Texas at Austin.
July 2014: Awarded of $3 million by NSF and Intel to address health care needs
In partnership with Intel Corporation, NSF announced the first InTrans award of $3 million to a team of researchers who are designing customizable, domain-specific computing technologies for use in healthcare. The work could lead to less exposure to dangerous radiation during x-rays by speeding up the computing side of medicine. It also could result in patient-specific cancer treatments.Led by the University of California, Los Angeles, the research team includes experts in computer science and engineering, electrical engineering and medicine from Rice University and Oregon Health and Science University. The team comes mainly from the Center of Domain-Specific Computing (CDSC), which was supported by an NSF Expeditions in Computing Award in 2009.
In the project, the researchers looked beyond parallelization (the process of working on a problem with more than one processor at the same time) and instead focused on domain-specific customization, a disruptive technology with the potential to bring orders-of-magnitude improvements to important applications. Domain-specific computing systems work efficiently on specific problems – in this case, medical imaging and DNA sequencing of tumors – or a set of problems with similar features, reducing the time to solution and bringing down costs.The InTrans program not only advances important fundamental research and integrates it into industry, it also benefits society by improving medical imaging technologies and cancer treatments, helping to extend lives.
For details, please see NSF and UCLA press releases:
Taking great ideas from the lab to the fab
UCLA Engineering-led team receives $3 million boost from NSF and Intel for high-performance healthcare computing
First NSF InTrans Grant Awarded to UCLA
February 2014: Inivted Demo at Xilinx ETS 2014 Academic Exhibition
In the Xilinx Emerging Technology Symposium (ETS) on Feburary 13rd, 2014, the UCLA team led by Professor Jason Cong are invited to demo FPGA acceleration on a 3-D medical imaging pipeline and an end-to-end system level automation flow called CMOST (Customization, Mapping, Optimization, Scheduling and Transformation).
ACM/IEEE A. Richard Newton Technical Impact Award in Electric Design Automation
Professor Jason Cong and his former Ph.D. student Dr. Eugene Ding (now with Xilinx) received this year’sACM/IEEE A. Richard Newton Technical Impact Award in Electronic Design Automationat the opening session of the 48th Design Automation Conference. |
The award was given for “pioneering work on technology mapping for FPGA that has made a significant impact on the FPGA research community and industry,” as evidenced by a paper published at least ten years prior to the award. Prof. Cong and Dr. Ding are honored for their paper “FlowMap: An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs” (IEEE Transactions on Computer-Aided Design, vol 13, no. 1, pp. 1-12,January 1994)
Posted June 15, 2011
A team from UCLA and UIUC has won a Best Paper Award for the collaborative Multilevel Granularity Parallelism Synthesis on FPGAs
The paper, authored by A. Papakonstantinou, Y. Liang, J. Stratton, K. Gururaj, D. Chen, W. M. Hwu, and J. Cong, was selected out of 120 submissions to the 2011 IEEE International Symposium on Field-Programmable Custom Computing Machines.This work (code-named FCUDA-II) offers an advanced modeling and search engine in the multi-granularity parallelism design space to map CUDA kernels to FPGAs. It combines resource/period/latency modeling with a theoretically optimal yet efficient search algorithm to identify the best combination of various parallelism/design parameters in a short period of time. It offers up to 7x speedup in terms of performance compared to the original FCUDA work (which received the Best Paper Award at SASP 2009). The collaboration between researchers from UCLA and UIUC has been very successful.Download “Multilevel Granularity Parallelism Synthesis on FPGAs” (PDF)
Posted May 12, 2011
AutoESL was founded directly by faculty and graduate students from the UCLA Henry Samueli School of Engineering and Applied Science. Using the technology licensed from UCLA, AutoESL found a critical niche in developing tools that reduce design time and improve the quality of integrated circuit design, and in less than five years, the company became an acquisition target for Xilinx. “I believe that university spinoffs involving the developers of the original technology are the best way to bridge such gaps.” – said by Jason Cong, Chancellor’s Professor in computer science at UCLA Engineering and a co-founder of AutoESL, worked with UCLA Engineering graduate students in developing the technology.
Posted March 7, 2011
PhD students Bin Lin and Yi Zou of Prof. Jason Cong in the Computer Science Department won the First Prize of CADathlon @ ICCAD, which took place on Sunday, Nov. 9, 2010 prior to ICCAD’2010
The Second Prize was shared by two teams from Univ. of Michigan and UC Berkeley.About CADathlon @ ICCAD: In the spirit of the long-running ACM programming contest, the CADathlon challenges students in their CAD knowledge, and their problem solving, programming, and teamwork skills. It serves as an innovative initiative to assist in the development of top students in the EDA field. The contest will provide a platform for SIGDA, academia, and industry to focus attention on the best and brightest of next generation CAD professionals.For more details, please visit http://www.sigda.org/programs/cadathlon/
Posted November 24, 2010
IEEE CAS Awards 2010 (July 2010)
Prof. Jason Cong is the recipient of the 2010 IEEE Circuits and System (CAS) Society Technical Achievement Award. This award honors the individual whose exceptional technical contributions to a field within the scope of the CAS Society have been consistently evident over a period of years. The citation of the award for Prof. Cong reads “For seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation”. Prof. Cong received the award at the IEEE International SoC Conference on September 27, 2010.For more details, please visit the CAS Newsletter, available online.
Posted February 14, 2011
Customized Computing for Health Care: Researchers are designing targeted types of computer software and hardware
Posted July 26, 2010
Press Release 09-190 by National Science Foundation
Released October 6, 2009
Posted August 11, 2009