Wan-Hsuan Lin’s research focuses on building scalable tools and algorithms that translate quantum programs into instructions executable on real quantum hardware. With 7 publications in top design automation venues, she has made significant contributions to improving the scalability and efficiency of quantum compilers.

Pushing the Limit for the Compilation Scalability: As quantum chips increase in size and complexity, Wan-Hsuan tackled the challenge of scaling quantum compilers. She first improved the core satisfiability modulo theory (SMT) formulation for quantum compilation by proposing more succinct encodings and efficient optimization routines, achieving speedups of up to 700× over prior methods. To address scenarios involving hundreds or thousands of qubits—where solver-based approaches become impractical—she introduced a multilevel framework inspired by VLSI design. This method applies global optimization at a coarse level using solvers, and then guides heuristic refinements at finer levels, enabling scalable compilation for large quantum systems.

Quantum Architecture Exploration: Beyond compilation, Wan-Hsuan’s work explores how to co-design quantum software and hardware. For fixed-connectivity architectures, she extended her SMT-based compilation framework to support application-specific architecture optimization, achieving significant fidelity improvements on workloads like quantum convolutional neural networks. For reconfigurable architectures, she developed a compiler called ZAC for zoned quantum systems, where qubits move between memory and compute zones. By optimizing movement and minimizing errors from shuttling operations, ZAC substantially improves circuit fidelity. Her work helps evaluate and shape future quantum hardware architectures by bridging the gap between physical design and quantum application requirements

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