Abstract:
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased core-per-socket count will continue, despite a lack of parallel software. Future CMPs must deliver thread-level parallelism when software provides threads to run, but must also continue to deliver high single-thread performance–via instruction-level and memory-level parallelism–to mitigate sequential bottlenecks and/or to guarantee service-level agreements. However, power limitations will prevent conventional cores from exploiting both simultaneously. The Wisconsin Multifacet project has recently developed two alternative scaleable core architectures, which can scale their execution logic up to run single threads fast, or down to run multiple threads within a fixed power budget. WiDGET (Wisconsin Decoupled Grid Execution Tiles) decouples thread context management from a sea of simple execution units. WiDGET’s decoupled design provides flexibility to alter resource allocation for a particular power-performance target while turning off unallocated resources. Forwardflow dynamically builds an explicit internal dataflow representation from a conventional instruction set architecture, using forward dependence pointers to guide instruction wakeup, selection, and issue. Forwardflow’s backend is organized into discrete units that can be individually (de-)activated, allowing each core’s performance to be scaled by system software at the architectural level.