CDSC UCLA Logo

Center for Domain-Specific Computing

UCLA Logo

  • Home
  • People
    • Faculty
    • Postdoc Researchers
    • CDSC Staff, Research Scientists and Associate Faculty
  • Research
    • Application Drivers
    • Architectures
    • Modeling & Mapping
    • Experimental System
  • Resources
    • Publications
    • Presentations
    • Software Releases
  • Partners
  • Education
  • News
  • Events
  • About Us
    • Job Opportunities
You are here: Home / Events / CDSC/InTrans Project Annual Review Meeting, February 28-March 1, 2019
Loading Events

« All Events

  • This event has passed.

CDSC/InTrans Project Annual Review Meeting, February 28-March 1, 2019

February 28, 2019 - March 1, 2019

  • « CDSC/InTrans Project Annual Review Meeting
  • CDSC Annual Review Meeting, February 27-28, 2020 »

CDSC/INTRANS PROJECT ANNUAL REVIEW MEETING FEBRUARY 28 AND MARCH 1, 2019

Mong Learning Center, 180 Auditorium Eng VI (No Food & Drink Allowed)

 

February 28, 2019 Mong Learning Center, 180 Auditorium Eng VI (No Food & Drink Allowed)

 

8:00am-8:30am Breakfast – First Floor Breezeway, Patio, Tannas Alumni Suite 176 Eng VI

8:30am-8:50am Welcome Remarks, HSSEAS (UCLA HSSEAS) Harold G. Monbouquette, Associate Dean, Research and Physical Resources, (UCLA HSSEAS). Adnan Darwiche, Department Chair, (UCLA CS)

8:50am-9:10am Center Overview, Jason Cong (UCLA CS/ECE)

9:10am-10:15am Architectures for Customizable Computing

  • Thrust Overview, Glenn Reinman, UCLA CS
  • ReACH: the Reconfigurable Accelerator Compute Hierarchy, Glenn Reinman, UCLA CS
  • INSIDER: Redesign Storage System for Emerging High-Performance Drive, Tong He, UCLA CS
  • Accelerating Irregular Machine Learning by Exploiting Sparse Processing Idioms, Vidushi Dadu, UCLA CS

10:15am-10:35am Break – First Floor Breezeway, Patio, Tannas Alumni Suite 176 Eng VI

10:35am-12:00pm Runtime and Compilation Support 

  • Thrust Overview, Vivek Sarkar, Georgia Tech
  • Stencil Compilation and Optimization for Customized Hardware, Yuze Chi, UCLA CS
  • Cost-driven thread coarsening for GPU kernels, Prithayan Barua, Georgia Tech, CS
  • A Data-Centric Approach for Modeling and Estimating Efficiency of Dataflows for DNN Accelerator Design, Prasanth Chatarasi, Georgia Tech, CS
  • Compilation for coarse-grain reconfigurable hardware, Vivek Sarkar, Georgia Tech

12:00am-1:10pm Lunch – First Floor Breezeway, Patio, Tannas Alumni Suite 176 Eng VI

1:10pm-1:55pm Keynote Speeches: Role of Virtualization in Domain Specific Computing, Uday Kurkure, VMWare Performance Engineering and Cascade: A Just-in-Time Compiler for Verilog, Eric Schkufza,  VMWare Research

1:55pm-3:20pm Application Drivers for Customizable Computing

  • Thrust Overview, Alex Bui, UCLA Radiology
  • Hardware Acceleration for the Third Generation Sequencing, Licheng Guo and Ka Cheong Jason Lau, UCLA CS
  • Joint Parsing for Understanding 3D Scenes and Human Activities in Videos, Yixin Zhu, UCLA Statistics
  • Using Deep Neural Nets to Enhance Computed Tomography Images, William Hsu, UCLA Radiology
  • Computational challenges in the analysis of whole-genome methylation data, Eran Halperin, UCLA CS and Medical School

3:20pm-3:40pm Break – First Floor Breezeway, Patio, Tannas Alumni Suite 176 Eng VI

3:40pm-4:45pm Implementation and Deployment of Customizable Computing

  • Thrust Overview, Jason Cong, UCLA CS
  • FPGA Acceleration of Calcium Imaging for in vivo Neural Signal Processing, Zhe Chen, UCLA CS and Psychology
  • Accelerating Deep Neural Nets with Dynamic Fine-Grained Gating, Zhiru Zhang, Cornell ECE
  • Rapid Cycle-Accurate Simulator for High-Level Synthesis, Young-Kyu Choi, UCLA CS

4:45pm-5:15pm Posters Introduction

5:30pm-8:00pm Poster session + Dinner reception – First Floor Breezeway, Patio, Tannas Alumni Suite 176 Eng VI

 

March 1, 2019 Mong Learning Center, 180 Auditorium Eng VI (No Food & Drink Allowed)

 

8:00am-8:30am Breakfast – First Floor Breezeway, Patio, Tannas Alumni Suite 176 Eng VI

8:30am-9:10am Keynote Speech:  Computational Methods for the Non-invasive Blood-based Cancer Detection, Jasmine Zhou, UCLA Pathology and Laboratory Medicine

9:10am-11:10am NSF/Intel Partnership on Computer Assisted Programming for Heterogeneous Architectures (CAPA) Session (including 20 min break in between)

  • CAPA Project Overview,  Jason Cong, UCLA CS
  • HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing, Zhiru Zhang, Cornell ECE
  • From DSLs to FPGAs, Jason Cong, UCLA CS

9:50am-10:10am Break – First Floor Breezeway, Patio, Tannas Alumni Suite 176 Eng VI

  • Software Refactoring for FPGA Synthesis using Dynamic Invariants, Miryung Kim, UCLA CS
  • Avoiding HLS Pitfalls with a Type System for HeteroCL, Adrian Sampson, Cornell ECE
  • Temporal-to-Spatial (T2S): Programming Spatial Architectures for Productive Performance, Hongbo Rong, Intel Labs

11:10am-12:10pm Industrial feedback session

12:10pm-1:10pm Lunch – First Floor Breezeway & Patio

  • CDSC Advisory Board Meeting, (CDSC industrial advisory board members only, 12:10pm-1:30pm over lunch at Tannas Alumni Suite 176 Eng VI)

 

KEYNOTE SPEAKERS

DAY 1: February 28, 2019

Speaker: Uday Kurkure, VMware Performance Engineering

Title: Role of Virtualization in Domain Specific Computing

Abstract

The 2018 ACM Turing Award lecture by John Hennessey and David Patterson predicts “A New Golden Age for Computer Architecture”, including the pervasive use of domain specific hardware/software. Indeed, domain specific architectures (e.g., GPUs, FPGAs) are increasingly deployed in such diverse environments as IoT, Edge Computing, Fog Computing, and Cloud Computing. At VMware, we believe virtualization is key to “democratizing” domain specific computing. However, there are many challenges to be addressed:  diverse workloads, the need for efficient utilization of cloud resources, multi-tenancy requirements, and security at scale. In this talk, we highlight the challenges and opportunities we see, including how VMware vSphere technologies are being applied.

Biography

Uday Kurkure works on GPU-based Machine Learning at VMware.  He is a co-chair of Virtualization in High Performance Computing and Simulation session at High Performance Computing and Simulation Conference (IEEE HPCS).  He was recently awarded the most prolific inventor award by VMware.  He has 14 patents and has published many research papers. His educational background includes a MS degree in Computer Science from Stanford and a B. Tech. in Electronics and Telecommunications from Indian Institute of Technology.  Uday has broad interests and experience in Machine Learning, Computer Graphics, ASIC/FPGA Design, and Compilers.  He has worked at Synopsys, Adobe Systems, Transmeta, and MIPS Computers.

 

Speaker: Eric Schkufza, VMware Research

Title:  Cascade: A Just-in-Time Compiler for Verilog

Abstract

FPGAs can exceed the performance of general-purpose CPUs by several orders of magnitude and offer dramatically lower cost and time to market than ASICs. While the benefits are substantial, programming an FPGA can be an extremely slow process. Trivial programs can take several minutes to compile using a traditional compiler, and complex designs can take hours or longer.  Cascade is a novel solution to this problem, the world’s first just-in-time compiler for Verilog. Cascade executes code immediately in a software simulator, and performs compilation in the background. When compilation is finished, the code is moved into hardware, and from the user’s perspective it simply gets faster over time. Cascade’s ability to move code back and forth between software and hardware also makes it the first platform to provide generic support for the execution of unsynthesizable Verilog from hardware. The effects are substantial. Cascade encourages more frequent compilation, reduces the time required for developers to produce working hardware designs, and transforms HDL development into something which closely resembles writing JavaScript or Python. It takes the first steps towards bridging the gap between programming software and programming hardware.

Biography

Eric Schkufza is a researcher with the VMware Research Group. He is interested in applying the tools of large-scale data analysis and machine learning to the design of optimizing compilers. His work focuses on the analysis and optimization of low-level machine code in the absence of its original source, most recently in the context of hardware accelerators.

 

DAY 2: March 1, 2019

Speaker: Xianghong Jasmine Zhou, Professor, UCLA Pathology and Laboratory Medicine

Title: Computational Methods for the Non-invasive Blood-based Cancer Detection

Abstract

Detecting cancer early – before it metastasizes – is the best strategy to increase survival. Recently, cell-free DNA (cfDNA) showed great premise in facilitating the early cancer detection. When cells die, they leave traces in the form of cell-free DNA (cfDNA). In our blood, cfDNA is a mixture of DNA fragments released from dying cells in many different organs. Using biomarkers based on cfDNA methylation carries two unique and major advantages: (1) DNA methylation patterns are tissue-specific, allowing inference of the tumor location; and (2) DNA methylation is pervasive by nature, meaning that an abnormal methylation state tends to propagate over a region of the genome, making it easier to detect. We recently developed two methods, CancerLocato and CancerDetecto, to exploit these two advantages. Using the first property, CancerLocator not only detects the presence of cancer, but also pinpoints its location in the body. Using the second property, CancerDetectoramplifies the signals of trace amounts of tumor cfDNA in plasma, and sensitively identifies tumor cfDNA at the level of individual reads.

Biography

Xianghong (Jasmine) Zhou is a Professor of Pathology and Lab Medicine at UCLA. Her team developed innovative methods for genome-based diagnostics, network biology, as well as novel approaches to analyze multi-dimensional genomics data. Since four years her lab has been focusing on early cancer detection using liquid biopsy. She is currently serving as the contact PI for the UCLA Center for the Early Detection of Liver Cancer, and previously she served the contact PI for the NIH Knowledge Base and Coordination Center of the Mechanism-based Disease Connections. She was a standing member of the NIH Biodata Management & Analysis grant review panel (2010-2016). She has previously served as the Head of the Computational Biology and Bioinformatics Program at University of Southern California. She was an associate editor of the journal PLOS Computational Biology and BMC Genomics. She served the program committees and organizing committees of many international conferences. She was a recipient of several awards including an Alfred Sloan fellowship and a NSF Career award.

 

LIST OF POSTERS

Architectures for Customizable Computing

INSIDER: Redesign Storage System for Emerging Storage Drive, Zhenyuan Ruan, UCLA CS

ReACH: A Reconfigurable Accelerator Compute Hierarchy, Nazanin Farahpour, UCLA CS

Stream-based memory specialization for general purpose processor, Zhengrong Wang, UCLA CS

A Data-Centric Approach for Modeling and Estimating Efficiency of Dataflows for Accelerator Design, Prasanth Chatarasi, Georgia Tech, CS

Runtime and Compilation Support

Automated and Efficient Design Space Exploration for Accelerator Synthesis, Cody Hao Yu, UCLA CS

Recent Progress on PolySA: Applications and Extensions, Jie Wang, UCLA CS

Multinode Optimization of Cost in Heterogeneous Cloud with Accelerators, Peipei Zhou, UCLA CS

SODA: Stencil with Optimized Dataflow Architecture, Yuze Chi, UCLA CS

Rapid Cycle-Accurate Simulator for High-Level Synthesis, Young-Kyu Choi, UCLA CS

Compiler Optimizations for Directive based Programming of GPUs, Prithayan Barua, Georgia Tech, CS

Application Drivers for Customizable Computing

Enhancing Computed Tomography Images via Optimizing Loss Functions Based on High-Level Features, Leihao Wei, UCLA ECE

Hardware Acceleration of Long Read Pairwise Overlapping in Genome Sequencing: A Race Between FPGA and GPU, Licheng Guo & Jason Lau, UCLA CS

Prototyping and Deployment of Customizable Computing

An FPGA-based BWT Accelerator for Bzip2 Data Compression, Weikang Qiao, UCLA ECE

FPGA Acceleration of Calcium Image Processing for in vivo Neural Signal Analysis. Zhe Chen, UCLA CS and Psychology

HLS‐Based Optimization and Design Space Exploration for Applications with Variable Loop Bounds, Young-Kyu Choi, UCLA CS

Real-time Pose Detection on FPGA, Atefeh Sohrabizadeh, UCLA CS

 

  • Google Calendar
  • iCalendar
  • Outlook 365
  • Outlook Live

Details

Start:
February 28, 2019
End:
March 1, 2019
  • « CDSC/InTrans Project Annual Review Meeting
  • CDSC Annual Review Meeting, February 27-28, 2020 »

© 2017 UC REGENTS TERMS OF USE & PRIVACY POLICY

  1. ABOUT
  2. JOBS
  3. LOGIN